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e0152e7481
Pull RISC-V updates from Palmer Dabbelt: - Support for the new "riscv,isa-extensions" and "riscv,isa-base" device tree interfaces for probing extensions - Support for userspace access to the performance counters - Support for more instructions in kprobes - Crash kernels can be allocated above 4GiB - Support for KCFI - Support for ELFs in !MMU configurations - ARCH_KMALLOC_MINALIGN has been reduced to 8 - mmap() defaults to sv48-sized addresses, with longer addresses hidden behind a hint (similar to Arm and Intel) - Also various fixes and cleanups * tag 'riscv-for-linus-6.6-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (51 commits) lib/Kconfig.debug: Restrict DEBUG_INFO_SPLIT for RISC-V riscv: support PREEMPT_DYNAMIC with static keys riscv: Move create_tmp_mapping() to init sections riscv: Mark KASAN tmp* page tables variables as static riscv: mm: use bitmap_zero() API riscv: enable DEBUG_FORCE_FUNCTION_ALIGN_64B riscv: remove redundant mv instructions RISC-V: mm: Document mmap changes RISC-V: mm: Update pgtable comment documentation RISC-V: mm: Add tests for RISC-V mm RISC-V: mm: Restrict address space for sv39,sv48,sv57 riscv: enable DMA_BOUNCE_UNALIGNED_KMALLOC for !dma_coherent riscv: allow kmalloc() caches aligned to the smallest value riscv: support the elf-fdpic binfmt loader binfmt_elf_fdpic: support 64-bit systems riscv: Allow CONFIG_CFI_CLANG to be selected riscv/purgatory: Disable CFI riscv: Add CFI error handling riscv: Add ftrace_stub_graph riscv: Add types to indirectly called assembly functions ...
128 lines
2.7 KiB
C
128 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
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/*
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* Copyright (C) 2012 Regents of the University of California
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*/
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#ifndef _UAPI_ASM_RISCV_PTRACE_H
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#define _UAPI_ASM_RISCV_PTRACE_H
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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#define PTRACE_GETFDPIC 33
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#define PTRACE_GETFDPIC_EXEC 0
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#define PTRACE_GETFDPIC_INTERP 1
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/*
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* User-mode register state for core dumps, ptrace, sigcontext
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*
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* This decouples struct pt_regs from the userspace ABI.
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* struct user_regs_struct must form a prefix of struct pt_regs.
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*/
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struct user_regs_struct {
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unsigned long pc;
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unsigned long ra;
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unsigned long sp;
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unsigned long gp;
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unsigned long tp;
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unsigned long t0;
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unsigned long t1;
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unsigned long t2;
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unsigned long s0;
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unsigned long s1;
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unsigned long a0;
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unsigned long a1;
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unsigned long a2;
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unsigned long a3;
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unsigned long a4;
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unsigned long a5;
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unsigned long a6;
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unsigned long a7;
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unsigned long s2;
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unsigned long s3;
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unsigned long s4;
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unsigned long s5;
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unsigned long s6;
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unsigned long s7;
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unsigned long s8;
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unsigned long s9;
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unsigned long s10;
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unsigned long s11;
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unsigned long t3;
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unsigned long t4;
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unsigned long t5;
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unsigned long t6;
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};
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struct __riscv_f_ext_state {
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__u32 f[32];
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__u32 fcsr;
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};
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struct __riscv_d_ext_state {
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__u64 f[32];
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__u32 fcsr;
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};
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struct __riscv_q_ext_state {
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__u64 f[64] __attribute__((aligned(16)));
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__u32 fcsr;
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/*
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* Reserved for expansion of sigcontext structure. Currently zeroed
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* upon signal, and must be zero upon sigreturn.
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*/
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__u32 reserved[3];
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};
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struct __riscv_ctx_hdr {
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__u32 magic;
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__u32 size;
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};
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struct __riscv_extra_ext_header {
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__u32 __padding[129] __attribute__((aligned(16)));
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/*
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* Reserved for expansion of sigcontext structure. Currently zeroed
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* upon signal, and must be zero upon sigreturn.
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*/
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__u32 reserved;
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struct __riscv_ctx_hdr hdr;
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};
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union __riscv_fp_state {
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struct __riscv_f_ext_state f;
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struct __riscv_d_ext_state d;
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struct __riscv_q_ext_state q;
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};
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struct __riscv_v_ext_state {
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unsigned long vstart;
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unsigned long vl;
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unsigned long vtype;
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unsigned long vcsr;
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unsigned long vlenb;
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void *datap;
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/*
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* In signal handler, datap will be set a correct user stack offset
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* and vector registers will be copied to the address of datap
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* pointer.
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*
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* In ptrace syscall, datap will be set to zero and the vector
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* registers will be copied to the address right after this
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* structure.
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*/
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};
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/*
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* According to spec: The number of bits in a single vector register,
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* VLEN >= ELEN, which must be a power of 2, and must be no greater than
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* 2^16 = 65536bits = 8192bytes
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*/
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#define RISCV_MAX_VLENB (8192)
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#endif /* __ASSEMBLY__ */
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#endif /* _UAPI_ASM_RISCV_PTRACE_H */
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