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https://github.com/lkl/linux.git
synced 2025-12-19 16:13:19 +09:00
42a7f6e3ff
Pull x86 microcode loading updates from Borislav Petkov: "The first, cleanup part of the microcode loader reorg tglx has been working on. The other part wasn't fully ready in time so it will follow on later. This part makes the loader core code as it is practically enabled on pretty much every baremetal machine so there's no need to have the Kconfig items. In addition, there are cleanups which prepare for future feature enablement" * tag 'x86_microcode_for_v6.6_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/microcode: Remove remaining references to CONFIG_MICROCODE_AMD x86/microcode/intel: Remove pointless mutex x86/microcode/intel: Remove debug code x86/microcode: Move core specific defines to local header x86/microcode/intel: Rename get_datasize() since its used externally x86/microcode: Make reload_early_microcode() static x86/microcode: Include vendor headers into microcode.h x86/microcode/intel: Move microcode functions out of cpu/intel.c x86/microcode: Hide the config knob x86/mm: Remove unused microcode.h include x86/microcode: Remove microcode_mutex x86/microcode/AMD: Rip out static buffers
85 lines
1.9 KiB
C
85 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_MICROCODE_H
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#define _ASM_X86_MICROCODE_H
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struct cpu_signature {
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unsigned int sig;
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unsigned int pf;
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unsigned int rev;
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};
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struct ucode_cpu_info {
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struct cpu_signature cpu_sig;
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void *mc;
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};
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#ifdef CONFIG_MICROCODE
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void load_ucode_bsp(void);
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void load_ucode_ap(void);
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void microcode_bsp_resume(void);
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#else
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static inline void load_ucode_bsp(void) { }
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static inline void load_ucode_ap(void) { }
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static inline void microcode_bsp_resume(void) { }
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#endif
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#ifdef CONFIG_CPU_SUP_INTEL
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/* Intel specific microcode defines. Public for IFS */
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struct microcode_header_intel {
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unsigned int hdrver;
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unsigned int rev;
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unsigned int date;
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unsigned int sig;
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unsigned int cksum;
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unsigned int ldrver;
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unsigned int pf;
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unsigned int datasize;
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unsigned int totalsize;
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unsigned int metasize;
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unsigned int reserved[2];
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};
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struct microcode_intel {
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struct microcode_header_intel hdr;
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unsigned int bits[];
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};
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#define DEFAULT_UCODE_DATASIZE (2000)
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#define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))
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#define MC_HEADER_TYPE_MICROCODE 1
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#define MC_HEADER_TYPE_IFS 2
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static inline int intel_microcode_get_datasize(struct microcode_header_intel *hdr)
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{
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return hdr->datasize ? : DEFAULT_UCODE_DATASIZE;
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}
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static inline u32 intel_get_microcode_revision(void)
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{
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u32 rev, dummy;
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native_wrmsrl(MSR_IA32_UCODE_REV, 0);
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/* As documented in the SDM: Do a CPUID 1 here */
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native_cpuid_eax(1);
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/* get the current revision from MSR 0x8B */
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native_rdmsr(MSR_IA32_UCODE_REV, dummy, rev);
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return rev;
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}
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void show_ucode_info_early(void);
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#else /* CONFIG_CPU_SUP_INTEL */
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static inline void show_ucode_info_early(void) { }
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#endif /* !CONFIG_CPU_SUP_INTEL */
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#ifdef CONFIG_CPU_SUP_AMD
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void amd_check_microcode(void);
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#else /* CONFIG_CPU_SUP_AMD */
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static inline void amd_check_microcode(void) {}
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#endif
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#endif /* _ASM_X86_MICROCODE_H */
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