Alex Deucher 485d531c69 drm/amdgpu/swsmu/smu12: fix force clock handling for mclk ...

The state array is in the reverse order compared to other asics
(high to low rather than low to high).

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1313
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2020-09-29 16:14:03 -04:00

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Makefile

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renoir_ppt.c

drm/amdgpu/swsmu/smu12: fix force clock handling for mclk

2020-09-29 16:14:03 -04:00

renoir_ppt.h

drm/amd/pm: correct Renoir UMD Stable Pstate settings

2020-09-17 17:48:58 -04:00

smu_v12_0.c

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