Josip Pavic 110b055b28 drm/amd/display: add getter routine to retrieve mpcc mux ...

[Why & How]
Add function to identify which MPCC is providing input to a specified OPP

Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2020-12-23 15:02:55 -05:00

..

hw

drm/amd/display: add getter routine to retrieve mpcc mux

2020-12-23 15:02:55 -05:00

bw_fixed.h

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clock_source.h

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compressor.h

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core_status.h

drm/amd/display: fail instead of div by zero/bugcheck

2020-11-02 15:30:47 -05:00

core_types.h

drm/amd/display: Prevent freesync power optimization during validation

2020-11-10 14:24:48 -05:00

custom_float.h

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dc_link_ddc.h

drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update

2020-07-01 01:59:26 -04:00

dc_link_dp.h

drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update

2020-07-01 01:59:26 -04:00

dce_calcs.h

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dcn_calc_math.h

drm/amd/display: fixup DML dependencies

2020-01-16 14:16:48 -05:00

dcn_calcs.h

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hw_sequencer_private.h

drm/amd/display: move panel power seq to new panel struct

2020-04-22 18:11:48 -04:00

hw_sequencer.h

drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)

2020-11-04 17:11:37 -05:00

link_hwss.h

drm/amd/display: correct eDP T9 delay

2020-11-02 15:31:10 -05:00

reg_helper.h

drm/amd/display: Indirect reg read macro with shift and mask

2020-01-16 14:13:53 -05:00

resource.h

drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)

2020-11-04 17:11:37 -05:00

vm_helper.h

…