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iommu/amd: Switch to MSI base domains
Remove the global PCI/MSI irqdomain implementation and provide the required MSI parent ops so the PCI/MSI code can detect the new parent and setup per device domains. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Acked-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20221124232326.209212272@linutronix.de
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@@ -218,6 +218,7 @@ static bool x86_init_dev_msi_info(struct device *dev, struct irq_domain *domain,
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info->flags |= MSI_FLAG_NOMASK_QUIRK;
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info->flags |= MSI_FLAG_NOMASK_QUIRK;
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break;
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break;
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case DOMAIN_BUS_DMAR:
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case DOMAIN_BUS_DMAR:
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case DOMAIN_BUS_AMDVI:
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break;
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break;
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default:
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default:
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WARN_ON_ONCE(1);
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WARN_ON_ONCE(1);
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@@ -734,7 +734,6 @@ struct amd_iommu {
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u8 max_counters;
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u8 max_counters;
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#ifdef CONFIG_IRQ_REMAP
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#ifdef CONFIG_IRQ_REMAP
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struct irq_domain *ir_domain;
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struct irq_domain *ir_domain;
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struct irq_domain *msi_domain;
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struct amd_irte_ops *irte_ops;
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struct amd_irte_ops *irte_ops;
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#endif
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#endif
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@@ -815,7 +815,7 @@ amd_iommu_set_pci_msi_domain(struct device *dev, struct amd_iommu *iommu)
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!pci_dev_has_default_msi_parent_domain(to_pci_dev(dev)))
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!pci_dev_has_default_msi_parent_domain(to_pci_dev(dev)))
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return;
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return;
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dev_set_msi_domain(dev, iommu->msi_domain);
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dev_set_msi_domain(dev, iommu->ir_domain);
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}
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}
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#else /* CONFIG_IRQ_REMAP */
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#else /* CONFIG_IRQ_REMAP */
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@@ -3648,6 +3648,12 @@ static struct irq_chip amd_ir_chip = {
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.irq_compose_msi_msg = ir_compose_msi_msg,
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.irq_compose_msi_msg = ir_compose_msi_msg,
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};
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};
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static const struct msi_parent_ops amdvi_msi_parent_ops = {
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.supported_flags = X86_VECTOR_MSI_FLAGS_SUPPORTED | MSI_FLAG_MULTI_PCI_MSI,
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.prefix = "IR-",
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.init_dev_msi_info = msi_parent_init_dev_msi_info,
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};
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int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
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int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
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{
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{
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struct fwnode_handle *fn;
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struct fwnode_handle *fn;
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@@ -3655,16 +3661,17 @@ int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
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fn = irq_domain_alloc_named_id_fwnode("AMD-IR", iommu->index);
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fn = irq_domain_alloc_named_id_fwnode("AMD-IR", iommu->index);
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if (!fn)
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if (!fn)
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return -ENOMEM;
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return -ENOMEM;
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iommu->ir_domain = irq_domain_create_tree(fn, &amd_ir_domain_ops, iommu);
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iommu->ir_domain = irq_domain_create_hierarchy(arch_get_ir_parent_domain(), 0, 0,
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fn, &amd_ir_domain_ops, iommu);
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if (!iommu->ir_domain) {
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if (!iommu->ir_domain) {
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irq_domain_free_fwnode(fn);
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irq_domain_free_fwnode(fn);
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return -ENOMEM;
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return -ENOMEM;
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}
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}
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iommu->ir_domain->parent = arch_get_ir_parent_domain();
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irq_domain_update_bus_token(iommu->ir_domain, DOMAIN_BUS_AMDVI);
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iommu->msi_domain = arch_create_remap_msi_irq_domain(iommu->ir_domain,
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iommu->ir_domain->flags |= IRQ_DOMAIN_FLAG_MSI_PARENT;
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"AMD-IR-MSI",
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iommu->ir_domain->msi_parent_ops = &amdvi_msi_parent_ops;
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iommu->index);
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return 0;
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return 0;
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}
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}
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@@ -24,6 +24,7 @@ enum irq_domain_bus_token {
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DOMAIN_BUS_PCI_DEVICE_MSI,
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DOMAIN_BUS_PCI_DEVICE_MSI,
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DOMAIN_BUS_PCI_DEVICE_MSIX,
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DOMAIN_BUS_PCI_DEVICE_MSIX,
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DOMAIN_BUS_DMAR,
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DOMAIN_BUS_DMAR,
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DOMAIN_BUS_AMDVI,
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};
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};
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#endif /* _LINUX_IRQDOMAIN_DEFS_H */
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#endif /* _LINUX_IRQDOMAIN_DEFS_H */
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