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Merge branch 'net-dsa-bcm_sf2-Clock-support'
Florian Fainelli says: ==================== net: dsa: bcm_sf2: Clock support This patch series adds support for controlling the SF2 switch core and divider clock (where applicable). ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
@@ -50,6 +50,13 @@ Optional properties:
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- reset-names: If the "reset" property is specified, this property should have
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- reset-names: If the "reset" property is specified, this property should have
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the value "switch" to denote the switch reset line.
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the value "switch" to denote the switch reset line.
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- clocks: when provided, the first phandle is to the switch's main clock and
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is valid for both BCM7445 and BCM7278. The second phandle is only applicable
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to BCM7445 and is to support dividing the switch core clock.
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- clock-names: when provided, the first phandle must be "sw_switch", and the
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second must be named "sw_switch_mdiv".
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Port subnodes:
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Port subnodes:
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Optional properties:
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Optional properties:
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@@ -14,6 +14,7 @@
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#include <linux/phy_fixed.h>
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#include <linux/phy_fixed.h>
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#include <linux/phylink.h>
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#include <linux/phylink.h>
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#include <linux/mii.h>
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#include <linux/mii.h>
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#include <linux/clk.h>
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#include <linux/of.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/of_irq.h>
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#include <linux/of_address.h>
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#include <linux/of_address.h>
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@@ -31,6 +32,49 @@
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#include "b53/b53_priv.h"
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#include "b53/b53_priv.h"
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#include "b53/b53_regs.h"
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#include "b53/b53_regs.h"
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/* Return the number of active ports, not counting the IMP (CPU) port */
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static unsigned int bcm_sf2_num_active_ports(struct dsa_switch *ds)
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{
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struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
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unsigned int port, count = 0;
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for (port = 0; port < ARRAY_SIZE(priv->port_sts); port++) {
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if (dsa_is_cpu_port(ds, port))
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continue;
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if (priv->port_sts[port].enabled)
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count++;
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}
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return count;
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}
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static void bcm_sf2_recalc_clock(struct dsa_switch *ds)
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{
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struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
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unsigned long new_rate;
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unsigned int ports_active;
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/* Frequenty in Mhz */
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const unsigned long rate_table[] = {
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59220000,
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60820000,
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62500000,
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62500000,
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};
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ports_active = bcm_sf2_num_active_ports(ds);
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if (ports_active == 0 || !priv->clk_mdiv)
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return;
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/* If we overflow our table, just use the recommended operational
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* frequency
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*/
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if (ports_active > ARRAY_SIZE(rate_table))
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new_rate = 90000000;
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else
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new_rate = rate_table[ports_active - 1];
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clk_set_rate(priv->clk_mdiv, new_rate);
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}
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static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port)
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static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port)
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{
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{
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struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
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struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
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@@ -82,6 +126,8 @@ static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port)
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reg &= ~(RX_DIS | TX_DIS);
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reg &= ~(RX_DIS | TX_DIS);
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core_writel(priv, reg, CORE_G_PCTL_PORT(port));
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core_writel(priv, reg, CORE_G_PCTL_PORT(port));
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}
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}
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priv->port_sts[port].enabled = true;
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}
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}
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static void bcm_sf2_gphy_enable_set(struct dsa_switch *ds, bool enable)
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static void bcm_sf2_gphy_enable_set(struct dsa_switch *ds, bool enable)
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@@ -167,6 +213,10 @@ static int bcm_sf2_port_setup(struct dsa_switch *ds, int port,
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if (!dsa_is_user_port(ds, port))
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if (!dsa_is_user_port(ds, port))
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return 0;
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return 0;
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priv->port_sts[port].enabled = true;
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bcm_sf2_recalc_clock(ds);
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/* Clear the memory power down */
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/* Clear the memory power down */
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reg = core_readl(priv, CORE_MEM_PSM_VDD_CTRL);
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reg = core_readl(priv, CORE_MEM_PSM_VDD_CTRL);
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reg &= ~P_TXQ_PSM_VDD(port);
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reg &= ~P_TXQ_PSM_VDD(port);
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@@ -260,6 +310,10 @@ static void bcm_sf2_port_disable(struct dsa_switch *ds, int port)
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reg = core_readl(priv, CORE_MEM_PSM_VDD_CTRL);
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reg = core_readl(priv, CORE_MEM_PSM_VDD_CTRL);
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reg |= P_TXQ_PSM_VDD(port);
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reg |= P_TXQ_PSM_VDD(port);
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core_writel(priv, reg, CORE_MEM_PSM_VDD_CTRL);
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core_writel(priv, reg, CORE_MEM_PSM_VDD_CTRL);
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priv->port_sts[port].enabled = false;
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bcm_sf2_recalc_clock(ds);
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}
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}
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@@ -750,6 +804,9 @@ static int bcm_sf2_sw_suspend(struct dsa_switch *ds)
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bcm_sf2_port_disable(ds, port);
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bcm_sf2_port_disable(ds, port);
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}
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}
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if (!priv->wol_ports_mask)
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clk_disable_unprepare(priv->clk);
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return 0;
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return 0;
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}
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}
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@@ -758,6 +815,9 @@ static int bcm_sf2_sw_resume(struct dsa_switch *ds)
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struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
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struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
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int ret;
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int ret;
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if (!priv->wol_ports_mask)
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clk_prepare_enable(priv->clk);
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ret = bcm_sf2_sw_rst(priv);
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ret = bcm_sf2_sw_rst(priv);
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if (ret) {
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if (ret) {
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pr_err("%s: failed to software reset switch\n", __func__);
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pr_err("%s: failed to software reset switch\n", __func__);
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@@ -1189,10 +1249,24 @@ static int bcm_sf2_sw_probe(struct platform_device *pdev)
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base++;
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base++;
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}
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}
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priv->clk = devm_clk_get_optional(&pdev->dev, "sw_switch");
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if (IS_ERR(priv->clk))
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return PTR_ERR(priv->clk);
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clk_prepare_enable(priv->clk);
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priv->clk_mdiv = devm_clk_get_optional(&pdev->dev, "sw_switch_mdiv");
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if (IS_ERR(priv->clk_mdiv)) {
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ret = PTR_ERR(priv->clk_mdiv);
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goto out_clk;
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}
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clk_prepare_enable(priv->clk_mdiv);
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ret = bcm_sf2_sw_rst(priv);
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ret = bcm_sf2_sw_rst(priv);
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if (ret) {
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if (ret) {
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pr_err("unable to software reset switch: %d\n", ret);
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pr_err("unable to software reset switch: %d\n", ret);
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return ret;
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goto out_clk_mdiv;
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}
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}
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bcm_sf2_gphy_enable_set(priv->dev->ds, true);
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bcm_sf2_gphy_enable_set(priv->dev->ds, true);
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@@ -1200,7 +1274,7 @@ static int bcm_sf2_sw_probe(struct platform_device *pdev)
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ret = bcm_sf2_mdio_register(ds);
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ret = bcm_sf2_mdio_register(ds);
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if (ret) {
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if (ret) {
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pr_err("failed to register MDIO bus\n");
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pr_err("failed to register MDIO bus\n");
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return ret;
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goto out_clk_mdiv;
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}
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}
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bcm_sf2_gphy_enable_set(priv->dev->ds, false);
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bcm_sf2_gphy_enable_set(priv->dev->ds, false);
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@@ -1267,6 +1341,10 @@ static int bcm_sf2_sw_probe(struct platform_device *pdev)
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out_mdio:
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out_mdio:
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bcm_sf2_mdio_unregister(priv);
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bcm_sf2_mdio_unregister(priv);
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out_clk_mdiv:
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clk_disable_unprepare(priv->clk_mdiv);
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out_clk:
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clk_disable_unprepare(priv->clk);
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return ret;
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return ret;
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}
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}
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@@ -1280,6 +1358,8 @@ static int bcm_sf2_sw_remove(struct platform_device *pdev)
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dsa_unregister_switch(priv->dev->ds);
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dsa_unregister_switch(priv->dev->ds);
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bcm_sf2_cfp_exit(priv->dev->ds);
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bcm_sf2_cfp_exit(priv->dev->ds);
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bcm_sf2_mdio_unregister(priv);
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bcm_sf2_mdio_unregister(priv);
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clk_disable_unprepare(priv->clk_mdiv);
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clk_disable_unprepare(priv->clk);
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if (priv->type == BCM7278_DEVICE_ID && !IS_ERR(priv->rcdev))
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if (priv->type == BCM7278_DEVICE_ID && !IS_ERR(priv->rcdev))
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reset_control_assert(priv->rcdev);
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reset_control_assert(priv->rcdev);
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@@ -45,6 +45,7 @@ struct bcm_sf2_hw_params {
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struct bcm_sf2_port_status {
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struct bcm_sf2_port_status {
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unsigned int link;
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unsigned int link;
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bool enabled;
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};
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};
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struct bcm_sf2_cfp_priv {
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struct bcm_sf2_cfp_priv {
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@@ -93,6 +94,9 @@ struct bcm_sf2_priv {
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/* Mask of ports enabled for Wake-on-LAN */
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/* Mask of ports enabled for Wake-on-LAN */
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u32 wol_ports_mask;
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u32 wol_ports_mask;
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struct clk *clk;
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struct clk *clk_mdiv;
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/* MoCA port location */
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/* MoCA port location */
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int moca_port;
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int moca_port;
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