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drm/amdgpu:schedule vce/vcn encode based on priority
Schedule the encode job in VCE/VCN encode ring based on the priority set by UMD. Signed-off-by: Satyajit Sahu <satyajit.sahu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
0ad29a4eb1
commit
7d7630fc6b
@@ -120,6 +120,18 @@ static enum amdgpu_gfx_pipe_priority amdgpu_ctx_prio_to_compute_prio(int32_t pri
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}
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}
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}
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}
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static enum amdgpu_ring_priority_level amdgpu_ctx_sched_prio_to_ring_prio(int32_t prio)
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{
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switch (prio) {
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case AMDGPU_CTX_PRIORITY_HIGH:
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return AMDGPU_RING_PRIO_1;
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case AMDGPU_CTX_PRIORITY_VERY_HIGH:
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return AMDGPU_RING_PRIO_2;
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default:
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return AMDGPU_RING_PRIO_0;
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}
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}
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static unsigned int amdgpu_ctx_get_hw_prio(struct amdgpu_ctx *ctx, u32 hw_ip)
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static unsigned int amdgpu_ctx_get_hw_prio(struct amdgpu_ctx *ctx, u32 hw_ip)
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{
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{
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struct amdgpu_device *adev = ctx->adev;
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struct amdgpu_device *adev = ctx->adev;
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@@ -133,6 +145,10 @@ static unsigned int amdgpu_ctx_get_hw_prio(struct amdgpu_ctx *ctx, u32 hw_ip)
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case AMDGPU_HW_IP_COMPUTE:
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case AMDGPU_HW_IP_COMPUTE:
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hw_prio = amdgpu_ctx_prio_to_compute_prio(ctx_prio);
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hw_prio = amdgpu_ctx_prio_to_compute_prio(ctx_prio);
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break;
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break;
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case AMDGPU_HW_IP_VCE:
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case AMDGPU_HW_IP_VCN_ENC:
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hw_prio = amdgpu_ctx_sched_prio_to_ring_prio(ctx_prio);
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break;
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default:
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default:
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hw_prio = AMDGPU_RING_PRIO_DEFAULT;
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hw_prio = AMDGPU_RING_PRIO_DEFAULT;
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break;
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break;
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