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Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

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Pull clk fixes from Stephen Boyd:
 "Some hot fixes for clk driver patches merged last week and one oops
  fix:

   - Fix license on recent MediaTek drivers

   - Initialize a variable before use in the new Visconti driver

   - Avoid an oops by unregistering the clk provider in si5341"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: mediatek: relicense mt7986 clock driver to GPL-2.0
  clk: visconti: Fix uninitialized variable in printk
  clk: si5341: Fix clock HW provider cleanup
This commit is contained in:
Linus Torvalds
2022-01-21 09:16:11 +02:00
parent 4141a5e694 b4966a7dc0
commit 39e77c484b
5 changed files with 5 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/clk/clk-si5341.c
View File

@@ -1740,7 +1740,7 @@ static int si5341_probe(struct i2c_client *client,
clk_prepare(data->clk[i].hw.clk); clk_prepare(data->clk[i].hw.clk);
} }
err = of_clk_add_hw_provider(client->dev.of_node, of_clk_si5341_get, err = devm_of_clk_add_hw_provider(&client->dev, of_clk_si5341_get,
data); data);
if (err) { if (err) {
dev_err(&client->dev, "unable to add clk provider\n"); dev_err(&client->dev, "unable to add clk provider\n");

2
drivers/clk/mediatek/clk-mt7986-apmixed.c
View File

@@ -1,4 +1,4 @@
// SPDX-License-Identifier: GPL-1.0 // SPDX-License-Identifier: GPL-2.0
/* /*
* Copyright (c) 2021 MediaTek Inc. * Copyright (c) 2021 MediaTek Inc.
* Author: Sam Shih <sam.shih@mediatek.com> * Author: Sam Shih <sam.shih@mediatek.com>

2
drivers/clk/mediatek/clk-mt7986-infracfg.c
View File

@@ -1,4 +1,4 @@
// SPDX-License-Identifier: GPL-1.0 // SPDX-License-Identifier: GPL-2.0
/* /*
* Copyright (c) 2021 MediaTek Inc. * Copyright (c) 2021 MediaTek Inc.
* Author: Sam Shih <sam.shih@mediatek.com> * Author: Sam Shih <sam.shih@mediatek.com>

2
drivers/clk/mediatek/clk-mt7986-topckgen.c
View File

@@ -1,4 +1,4 @@
// SPDX-License-Identifier: GPL-1.0 // SPDX-License-Identifier: GPL-2.0
/* /*
* Copyright (c) 2021 MediaTek Inc. * Copyright (c) 2021 MediaTek Inc.
* Author: Sam Shih <sam.shih@mediatek.com> * Author: Sam Shih <sam.shih@mediatek.com>

3
drivers/clk/visconti/pll.c
View File

@@ -246,7 +246,6 @@ static struct clk_hw *visconti_register_pll(struct visconti_pll_provider *ctx,
{ {
struct clk_init_data init; struct clk_init_data init;
struct visconti_pll *pll; struct visconti_pll *pll;
struct clk *pll_clk;
struct clk_hw *pll_hw_clk; struct clk_hw *pll_hw_clk;
size_t len; size_t len;
int ret; int ret;
@@ -277,7 +276,7 @@ static struct clk_hw *visconti_register_pll(struct visconti_pll_provider *ctx,
pll_hw_clk = &pll->hw; pll_hw_clk = &pll->hw;
ret = clk_hw_register(NULL, &pll->hw); ret = clk_hw_register(NULL, &pll->hw);
if (ret) { if (ret) {
pr_err("failed to register pll clock %s : %ld\n", name, PTR_ERR(pll_clk)); pr_err("failed to register pll clock %s : %d\n", name, ret);
kfree(pll); kfree(pll);
pll_hw_clk = ERR_PTR(ret); pll_hw_clk = ERR_PTR(ret);
} }