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dt-bindings: clock: qcom,gcc-sdx65: drop core_bi_pll_test_se
The test clock apparently it's not used by anyone upstream. Remove it. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221228185237.3111988-4-dmitry.baryshkov@linaro.org
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committed by
Bjorn Andersson
parent
5fe4abe32e
commit
3727ce670b
@@ -26,8 +26,6 @@ properties:
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- description: Sleep clock source
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- description: Sleep clock source
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- description: PCIE Pipe clock source
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- description: PCIE Pipe clock source
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- description: USB3 phy wrapper pipe clock source
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- description: USB3 phy wrapper pipe clock source
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- description: PLL test clock source (Optional clock)
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minItems: 5
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clock-names:
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clock-names:
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items:
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items:
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@@ -36,8 +34,6 @@ properties:
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- const: sleep_clk
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- const: sleep_clk
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- const: pcie_pipe_clk
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- const: pcie_pipe_clk
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- const: usb3_phy_wrapper_gcc_usb30_pipe_clk
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- const: usb3_phy_wrapper_gcc_usb30_pipe_clk
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- const: core_bi_pll_test_se # Optional clock
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minItems: 5
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required:
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required:
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- compatible
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- compatible
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@@ -56,9 +52,9 @@ examples:
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compatible = "qcom,gcc-sdx65";
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compatible = "qcom,gcc-sdx65";
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reg = <0x100000 0x1f7400>;
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reg = <0x100000 0x1f7400>;
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clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>,
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clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>,
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<&pcie_pipe_clk>, <&usb3_phy_wrapper_gcc_usb30_pipe_clk>, <&pll_test_clk>;
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<&pcie_pipe_clk>, <&usb3_phy_wrapper_gcc_usb30_pipe_clk>;
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clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk",
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clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk",
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"pcie_pipe_clk", "usb3_phy_wrapper_gcc_usb30_pipe_clk", "core_bi_pll_test_se";
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"pcie_pipe_clk", "usb3_phy_wrapper_gcc_usb30_pipe_clk";
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#clock-cells = <1>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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#power-domain-cells = <1>;
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